Brezplačna dostava za naročila nad 69.99 € na paketomatih Pošte Slovenije.

Preverjanje stanja naročila

Postanite del skupnosti ljubiteljev knjig z vsega sveta in uživajte v številnih ugodnostih. Ustvarite brezplačen račun

Brezplačna dostava Zásilkovna nad 69.99 €

Zbirna točka GLS 4.49 € Zbirna točka DPD 2.99 € Kurirska služba GLS 5.49 € Kurir DPD 3.49 € Kurirska služba 3.49 € Zbirno mesto Express One 3.49 € Zbirno mesto 3.49 € Dostava preko Pošte Slovenije 3.49 €

Kontakt

Kako nakupovati

Pomoč

Moj račun

▸ Prazna :-(

Brezplačna dostava za naročila nad 69.99 € na paketomatih Pošte Slovenije.

Guide to Computer Processor Architecture

Name: Guide to Computer Processor Architecture
Brand: Springer Nature B.V.
SKU: 43416395
Price: 57.05 EUR
Availability: InStock
Author: Goossens Bernard Goossens
ISBN: 9783031180248

A RISC-V Approach, with High-Level Synthesis

Goossens Bernard Goossens

Jezik

Angleščina

Knjiga Mehka

Koda Libristo: 43416395

Založba Springer Nature B.V., januar 2023

This unique, accessible textbook presents a succession of implementations of the open-source RISC-V... Celoten opis

Koda Libristo: 43416395

138 b

57.05 €

Na zalogi pri dobavitelju Odposlali bomo v 10-18 dneh

Do 30 dni za vračilo

Drugi so kupili tudi

Mitos políticos árabes Enmanuel Sivan

Mehka

23.10 €

Flow Nummer 92 (6/2025) Deutsche Medien-Manufaktur GmbH & Co. KG

Mehka

7.08 €

Throne of Glass - Collector Sarah J. Maas

Trda

28.37 €

Technológia pre 3. ročník učebného odboru pekár Gabriela Dubová

Mehka

24.52 €

Calendar girl. Février Audrey Carlan

Mehka

13.06 €

Transmetropolitan Tom 1 Warren Ellis

Trda

21.78 €

Adultos En Forma. C Javi Navas

Mehka

9.82 €

Emegin Sövalyeleri Nazim Alpman

Mehka

13.47 €

This unique, accessible textbook presents a succession of implementations of the open-source RISC-V processor. Implementations are offered in increasing difficulty (non-pipelined, pipelined, deeply pipelined, multi-threaded, multicore).

Each implementation is shown as a High-Level Synthesis (HLS) code in C++. This facilitates synthesis and testing on an FPGA-based development board (Such a board can be freely obtained from the Xilinx University Program targeting university professors).

The book can be useful for several reasons. First, it is a novel way to introduce computer architecture: The codes given can serve as labs for a processor architecture course. Second, the book content is based on the RISC-V Instruction Set Architecture, which is an open-source machine language promising to become the main machine language to be taught, replacing DLX and MIPS. Third, all the designs are implemented through the HLS tool, which is able to translate a C program into an intellectual property (IP). Lastly, HLS will become the new standard for IP implementations, replacing Verilog/VHDL; already there are job positions tied to HLS, with the argument of rapid IP development.

Hence, in addition to offering undergraduates a firm introduction, the textbook/guide can also serve engineers willing to implement processors on FPGA, as well as researchers willing to develop RISC-V based hardware simulators.

Bernard Goossens is Professor in the Faculty of Sciences at the Université de Perpignan, France. He is author of the French-language book from Springer, Architecture et microarchitecture des processeurs, 2002.