Kontakt
Kako nakupovati
Dostava
Svetovalec pri nakupu
ASIC/SoC Functional Design Verification
Angleščina
390 b
Do 30 dni za vračilo
Drugi so kupili tudi
This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
O knjigi
Angleščina
Podarite to knjigo še danes
To je povsem preprosto
1 Dodajte knjigo v košarico in izberite dostavo kot darilo 2 V zameno vam bomo poslali kupon 3 Knjiga bo dostavljena na naslov obdarovancaMorda bi vas zanimalo tudi
Pozdravljeni! Sem Libroamiko, vaš knjižni svetovalec.
Kako vam lahko pomagam?